Title: The Riscy Expedition
Abstract: The software community has benefited for years from open source projects and permissive licensing. This has allowed reusable libraries with proper APIs to flourish. The RISC-V ISA is an attempt to open up the processor design community in a similar way. The Riscy Expedition at MIT has developed a variety of RISC-V processors, including an embedded microcontroller with security accelerators for IOT applications [ISSCC 2017] and a superscalar, out-of-order (OOO) multicore. The OOO design boots Linux and beats in-order processors in terms of IPC but will require more architectural work to compete with wide superscalar commercial ARM processors [MICRO 2018]. We will also briefly describe our current work to support secure enclaves on our OOO processor. Our design framework is based on Guarded Atomic Actions and facilitates modular refinement. It has made it possible for teams of 2 to 3 students to undertake extremely sophisticated digital designs. We will also describe the wonderful experience of teaching our methodology in our introductory and advanced logic design and architecture classes. This work has been done by Andy Wright, Sizhuo Zhang and Thomas Bourgeat under my supervision.
Bio: Arvind is the Johnson Professor of Computer Science and Engineering at MIT. Arvind’s group, in collaboration with Motorola, built the Monsoon dataflow machines and its associated software in the late eighties. In 2000, Arvind started Sandburst which was sold to Broadcom in 2006. In 2003, Arvind co-founded Bluespec Inc., an EDA company to produce a set of tools for high-level synthesis. Arvind’s current research focus is to enable rapid development of embedded systems. Arvind is a Fellow of IEEE and ACM, and a member of the National Academy of Engineering and the American Academy of Arts and Sciences.
Host: Hank Hoffmann